Green Hills adds Arm architecture for a Trifecta of FACE 3.0 certifications
Green Hills Software has completed the certification of conformance for its INTEGRITY-178 Time-Variant Unified Multi Processing (tuMP) RTOS for Arm architectures to the Future Airborne Capability Environment (FACE) Technical Standard edition 3.0. The INTEGRITY-178 tuMP RTOS was previously certified for both Intel and Power Architecture, therefore all three major processor architectures used for security- and safety-critical applications are now certified. All certifications cover both the Safety Base and Security profiles and include verification for C, C++ and Ada support for both profiles. Even though version 3.0 of the FACE Technical Standard was published almost 1.5 years ago (November 2017), the INTEGRITY-178 tuMP RTOS remains the only software certified conformant to the latest revision.
Attaining conformance to the FACE 3.0 technical standard can be challenging for an operating system that is not designed to support the breadth of multicore architectures that exist in the market today. The FACE technical standard now requires any Operating System Segment (OSS) that claims support for multicore partitions to meet the 2015 update to ARINC-653 Part 1 Supplement 4, including the ability for “Multiple processes within a partition scheduled to execute concurrently on different processor cores.”
Simplistic multi-processing architectures, such as Asymmetric Multi-Processing (AMP), are not sufficient to meet the requirements of Supplement 4. INTEGRITY-178 tuMP implements a richer set of multi-processing functionality, allowing any combination of AMP, Bound Multi-Processing (BMP), and Symmetric Multi-Processing (SMP). BMP is an enhanced and restricted form of SMP that can statically bind an application’s ARINC-653 processes (i.e. threads) to a specific set of cores, allowing the system architect to more tightly control the concurrent operation of multiple cores. The INTEGRITY-178 tuMP RTOS implements AMP, BMP, and SMP on all of its FACE conformant processor architectures. INTEGRITY-178 tuMP functionality also makes it the only multicore RTOS solution suitable for Integrated Modular Avionics (IMA) as it provides the required features and tools necessary for system designers/integrators as well as sustainment operations to calculate the Worst Case Execution Times (WCET) of their airborne applications, while also mitigating the multicore interference risks and challenges.
In delivering FACE 3.0 conformance certification for Arm architecture, the INTEGRITY-178 tuMP RTOS provides architects of airborne systems the option to use a processor family with performance that rivals Intel architecture performance but with the increased determinism and reduced size, weight, and power that results from Arm’s reduced instruction set computing (RISC) design.