Silicon Laboratories announces the expansion of its PCI Express clock generator and clock buffer portfolio, providing clocking solutions for the stringent specifications of the PCIe Generation 1/2/3 standards. Silicon Labs’ expanded PCIe timing portfolio includes both off-the-shelf Si5214x clock generators and Si5315x clock buffers for power- and cost-sensitive PCIe applications and the Si5335 web-customizable clock generator/buffer for FPGA- and SoC-based designs requiring various differential clock formats that also comply with the PCIe standard.
The Si5214x clock generator and Si5315x clock buffer families consist of two- to nine-output timing devices. Lower power helps minimize heat dissipation and reduces the need for additional cooling components and power regulators. The devices also meet PCIe jitter requirements with up to 50 percent margin, leading to better system reliability and enhanced bit-error-rate performance. The devices use output buffer technology to integrate all external termination resistors, thereby reducing component count, BOM cost, board space and power. The smallest PCIe clocking devices on the market, the new clock generators and buffers are ideal for space-constrained applications.To combat EMI and RFI, the Si5214x and Si5315x families feature programmable edge rate and skew controls for each individual output. Using a built-in I2C interface, developers can fine-tune signals and fix integrity issues on the fly without adding more components. This signal integrity tuning capability streamlines EMI compliance, speeding time to market for PCIe board designs.
The Si5335 clock generator/buffer IC is an easy-to-customize clocking solution addressing complex timing challenges in PCIe- and FPGA-based applications. Factory-customized, pin-controlled Si5335 devices are available in two weeks through Silicon Labs’ ClockBuilder Web configuration utility. Any combination of up to four output frequencies ranging from 1 to 350 MHz can be configured on the Si5335 outputs. Up to three unique device configurations can be specified for a single part number, enabling the Si5335 to replace three separate clock generators or buffers and allowing developers to reuse a custom Si5335 device across multiple designs. The Si5335 clock generator/buffer IC features up to five user-assignable control pins to simplify PCIe and FPGA-based system design and streamline EMI compliance with its PCIe-compliant spread spectrum clocking option. The Si5335 simplifies multi-chip clocking challenges by supporting any combination of differential formats such as LVPECL, LVDS and CML and single-ended formats like LVCMOS. Eliminating the need for multiple clock generators and/or buffers, the device’s outputs support any combination of four differential outputs or up to eight LVCMOS outputs.
